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Gd silicate: A high-k dielectric compatible with high temperature annealing

H.D.B. Gottlob ; M Schmidt ; M.C. Lemme ; H Kurz ; I.Z. Mitrovic ; Maria Werner ; W.M. Davey ; S. Hall ; P.R. Chalker ; K. Cherkaoui ; P.K. Hurley ; Bahman Raeissi (Institutionen för mikroteknologi och nanovetenskap, Fysikalisk elektronik) ; Olof Engström (Institutionen för mikroteknologi och nanovetenskap, Fysikalisk elektronik) ; S.B. Newcomb ; Johan Piscator (Institutionen för mikroteknologi och nanovetenskap, Fysikalisk elektronik)
Journal of Vacuum Science & Technology B (1071-1023). Vol. 27 (2008), 1, p. 249-252.
[Artikel, refereegranskad vetenskaplig]

The authors report on the investigation of amorphous Gd-based silicates as high- k dielectrics. Two different stacks of amorphous gadolinium oxide (Gd2 O3) and silicon oxide (Si O2) on silicon substrates are compared after annealing at temperatures up to 1000 °C. Subsequently formed metal oxide semiconductor capacitors show a significant reduction in the capacitance equivalent thicknesses after annealing. Transmission electron microscopy, medium energy ion scattering, and x-ray diffraction analysis reveal distinct structural changes such as consumption of the Si O2 layer and formation of amorphous Gd silicate. The controlled formation of Gd silicates in this work indicates a route toward high- k dielectrics compatible with conventional, gate first complementary metal-oxide semiconductor integration schemes. © 2009 American Vacuum Society.

15th Workshop on Dielectrics in Microelectronics (WoDiM 2008), Bad Saarow, Germany, Jun 23-25 2008

Denna post skapades 2009-01-15. Senast ändrad 2016-07-25.
CPL Pubid: 87416


Institutioner (Chalmers)

Institutionen för mikroteknologi och nanovetenskap, Fysikalisk elektronik (2007-2010)


Materialfysik med ytfysik

Chalmers infrastruktur