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Process development and Reliability Study for System-in-a-Package by using a Liquid Crystal Polymer Substrate

Liu Chen (Institutionen för mikroteknologi och nanovetenskap, Fasta tillståndets elektronik)
Göteborg : External organization, 2005. ISBN: 91-7291-687-7.- 119 s.
[Doktorsavhandling]

System-in-a-package (SiP) aims to integrate all of the system functions within a system-level package, containing multiple ICs and other components interconnected through a high-density substrate. SiP is characterized by dividing chip functions among several smaller chips, by connecting chips in the first stage of board manufacture, and by integrating passive components in the substrate. The aim of this work is to develop enabling technologies for SiP concept. These technologies consist of exploring new substrate material (known as Liquid Crystal Polymer (LCP)), process development for electroless Cu deposition, embedding active and passive components, and reliability test and modeling. The advantage of using LCP as the substrate is specifically addressed. A structure based on the SiP concept is proposed in the present work, in which both active and passive components are embedded in a flexible substrate. To evaluate substrate material for this application, their mechanical reliability, electrical performance and environmental impact were first investigated. The LCP gave the best reliability both in bending and cooling situation, better microwave performance and less dissipation factor. It is also an environmental acceptable material. A new process enabling metallization of the LCP substrate has been demonstrated. The best adhesion between deposited copper and LCP is achieved under the process condition as H2SO4 etch acid, 30 second etching time, and using heat treatment after plating. Humidity test doesn’t influence the adhesion so much. This adhesion is believed to have both mechanical and chemical origin. The results obtained can be used for further development of a cheap flex laminate technology. Embedding process is demonstrated and developed by experiments. The failure was observed to be located on the copper lines, and the separation of chip and adhesives. 3D finite element method (FEM) gives stress distributions and warpage of the whole package, which has good agreements to the failure observed. The SiP structure optimization was done by the design of experiments method. Steady state and transient thermal modeling were employed, in which heat dissipation in SiP was revealed. Epoxy around the chip plays an important role to remove the heat when the thermal conductivity of the substrate is high. Thermal resistance was quantified for different copper thicknesses. Parameter studies on structure dimensions and materials properties were also made. For high power density application, channel cooling can increase the heat dissipation dramatically. Key words: System-in-a-Package, Embedded Active and Passives Technology, Liquid Crystal Polymer, Finite Element Simulation, Electroless Copper Plating, and Adhesion

Nyckelord: System-in-a-Package, Embedded Active and Passives Technology, Liquid Crystal Polymer, Finite Element Simulation, Electroless Copper Plating, and Adhesion



Denna post skapades 2007-01-15. Senast ändrad 2013-09-25.
CPL Pubid: 7190

 

Institutioner (Chalmers)

Institutionen för mikroteknologi och nanovetenskap, Fasta tillståndets elektronik (2003-2006)

Ämnesområden

Materialteknik

Chalmers infrastruktur

Relaterade publikationer

Inkluderade delarbeten:


Characterization of Substrate Materials for System-in-a-Package Applications


Process Development and Reliability for System-in-a-Package Using Liquid Crystal Polymer Substrate


Reliability Investigation for Encapsulated Isotropic Conductive Adhesives Flip Chip Interconnection


Examination

Datum: 2005-10-20
Tid: 10.00
Lokal: 10.00 Kollektorn, MC2, Kemivägen 9, Chalmers
Opponent: Professor Paul Conway, Loughborough University, UK

Ingår i serie

Doktorsavhandlingar vid Chalmers tekniska högskola. Ny serie 2369


Technical report MC2 - Department of Microtechnology and Nanoscience, Chalmers University of Technology 35