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FlexCore: Utilizing Exposed Datapath Control for Efficient Computing

Martin Thuresson (Institutionen för data- och informationsteknik, Datorteknik (Chalmers)) ; Magnus Själander (Institutionen för data- och informationsteknik, Datorteknik (Chalmers)) ; Magnus Björk (Institutionen för data- och informationsteknik, Datavetenskap (Chalmers)) ; Lars Svensson (Institutionen för data- och informationsteknik, Datorteknik (Chalmers)) ; Per Larsson-Edefors (Institutionen för data- och informationsteknik, Datorteknik (Chalmers)) ; Per Stenström (Institutionen för data- och informationsteknik, Datorteknik (Chalmers))
Journal of Signal Processing Systems (1939-8018). Vol. 57 (2009), 1, p. 5-19.
[Artikel, refereegranskad vetenskaplig]

We introduce FlexCore, the first exemplar of an architecture based on the FlexSoC framework. Comprising the same datapath units found in a conventional five-stage pipeline, the FlexCore has an exposed datapath control and a flexible interconnect to allow the datapath to be dynamically reconfigured as a consequence of code generation. Additionally, the FlexCore allows specialized datapath units to be inserted and utilized within the same architecture and compilation framework. This study shows that, in comparison to a conventional five-stage general-purpose processor, the FlexCore is up to 40\% more efficient in terms of cycle count on a set of benchmarks from the embedded application domain. We show that both the fine-grained control and the flexible interconnect contribute to the speedup. Furthermore, our synthesized, placed and routed FlexCore offers savings both in energy and execution time. The exposed FlexCore datapath requires a wide control word. The conducted evaluation confirms that this increases the instruction bandwidth and memory footprint. This calls for efficient instruction decoding as proposed in the FlexSoC framework.

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Denna post skapades 2008-05-21. Senast ändrad 2016-09-14.
CPL Pubid: 71085


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