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The Synchronization Power of Coalesced Memory Accesses

Phuong Ha ; Philippas Tsigas (Institutionen för data- och informationsteknik, Nätverk och system, Datakommunikation och distribuerade system (Chalmers)) ; Otto Anshus
Tromso : University of Tromso, 2008. - 16 s.

Multicore processor architectures have established themselves as the new generation of processor architectures. As part of the one core to many cores evolution, memory access mechanisms have advanced rapidly. Several new memory access mechanisms have been implemented in many modern commodity multicore processors. Memory access mechanisms, by devising how processors access the shared memory, directly in uence the synchronization capability of the multicore processor. Therefore, it is crucial to investigate the synchronization power of the new memory access mechanisms. This paper investigates the synchronization power of coalesced memory accesses, the new memory access mechanisms introduced in recent large multicore architectures like the CUDA graphics processors. We rst design three memory access models to capture the fundamental features of the new memory access mechanisms. Subsequently, we prove the exact synchronization power of these models in terms of their consensus numbers. These tight results show that the coalesced memory access models can support strong synchronization capability to the threads of multicore processors, without the need of synchronization primitives other than reads and writes. In the case of the contemporary CUDA processors, our results imply that the coalesced memory access models have consensus numbers up to thirty two.

Nyckelord: memory access models, consensus numbers, muticore processors, interprocess synchronization

(Department of Computing Science, University of Tromso, Technical report No: 2008-68, February 2008.)

Denna post skapades 2008-04-21. Senast ändrad 2009-12-30.
CPL Pubid: 70267