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Towards the Integration of Carbon nanostructures into CMOS technology

Mohammad Kabir (Institutionen för mikroteknologi och nanovetenskap, Fasta tillståndets elektronik)
Göteborg : External organization, 2005. ISBN: 91-7291-648-6.- 60 s.

Relentless efforts for miniaturization of traditional complementary metal oxide semiconductor (CMOS) devices have reached the limit where the device characteristics are governed by quantum phenomena which are difficult to control. This engendered a need for finding alternative new materials that can be engineered to fabricate devices that will possess at least the same or even better performance than existing CMOS devices. The choices of new material(s) is however limited by factors like production compatibility, reproducibility and cost efficiency. The scientific endeavor made in this thesis was focused on the technological requirements and issues related to integration of novel materials into a CMOS platform and developing potential solutions to some of the technological difficulties. Front end technology developed in this work includes interfacing molecules, gold clusters and carbon nanotubes. We have explored the quasi one-dimensional nature of these materials in combination with e. g. self assembling techniques, surface treatments, nanolithography and the scanning probe technique. A general understanding derived from the device characteristics is that the electrical characteristics of an electronic nano-device not only depends on the intrinsic properties of the materials but is also strongly correlated with the method of device fabrication. Probing the intrinsic property of the material is challenging since the interface between the material and the microscopic leads governs the device characteristics. The technological development of the vertical growth of the carbon nanofibers (CNFs) presented in this work is applicable to tackle the technological difficulties envisaged for the back end technology beyond the year 2010. At the early stage of the work technology was developed to selectively grow CNF on a silicon substrate with diverse topography. Extending the same technology towards CMOS integration faced problem with growth on candidate metals. The challenge was met by introducing a thin layer of a-Si as a part of the catalyst layer which actually boosted the growth on Pt, Pd, W and Mo metal underlayers. However the problem remains for Ti and Cr metal underlayers which is in apparent contradiction to results obtained by other groups. The developed technology can be explored to fabricated vertical nanorelay devices or electrochemical probes.

Nyckelord: Complementary metal oxide semiconductor (CMOS), carbon nanofiber (CNF), carbon nanotube (CNT), chemical vapour deposition (CVD), dc-glow discharge plasma, metal catalyst, silicidation, growth mechanism, electron beam lithography (EBL), atomic force microscopy (AFM), scanning electron microscopy (SEM), transmission electron microscopy (TEM).

Denna post skapades 2007-01-15. Senast ändrad 2013-09-25.
CPL Pubid: 6547


Institutioner (Chalmers)

Institutionen för mikroteknologi och nanovetenskap, Fasta tillståndets elektronik (2003-2006)



Chalmers infrastruktur


Datum: 2005-09-22
Tid: 13.15
Lokal: 13.15 KC, Kemigården, Chalmers
Opponent: Prof Bill Milne, University of Cambridge, Department of Engineering, Trumpington Street, Cambridge CB2 1PZ

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Technical report MC2 - Department of Microtechnology and Nanoscience, Chalmers University of Technology 36