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Three Phase Controlled Fault Interruption Using High Voltage SF6 Circuit Breakers

Richard Thomas (Institutionen för energi och miljö, Elteknik)
Göteborg : Chalmers University of Technology, 2007. ISBN: 978-91-7291-976-1.- 179 s.

A method is presented for implementing controlled fault interruption, using high voltage, SF6 circuit breakers on three phase high voltage power networks. The main goal of the method is to synchronize the opening or trip commands to each phase of a circuit breaker with respect to target current zero times so that each phase will interrupt with a preselected arcing time. Benefits of this approach include reduction in the electrical wear rate of the circuit breaker, in addition to providing potential to optimize existing interrupter technologies and facilitate new interruption techniques.

A generic structure for controlled fault interruption algorithms is proposed, aimed at utilizing synergies with existing digital power system protection methods. The proposed method is based on estimating the future behavior of the currents in each phase, using a generic model. The parameters of the model of the currents are obtained using least mean squares regression. Novel features of the proposed method include the use of analysis-of- variance tests to validate the model for targeting instant selection, provision of algorithm failure bypass control, identification of multiphase fault types and detection of the fault inception instant. A comprehensive range of future work proposals is also provided.

Simulations have been made using the proposed method for a range of multiphase fault cases than may occur on a three phase power network. The results indicate that the method is capable of discriminating between different fault cases and estimating target current zero times within ± 0.5 ms, within typical protection system response times of 5 to 20 ms, even with large random noise distortion of the measured current signals.

High power experiments have also been conducted to investigate the stability of the minimum arcing times of a high voltage, SF6 circuit breaker, operated at 80% of its normal opening speed, for a wide range of fault current interruption duties. The results of these experiments confirm the viability of controlled fault interruption from the perspective of minimum arcing time stability, in addition to indicating significant potential for circuit breaker optimization by using the controlled fault interruption technique to restrict the required arcing time window and thereby also the required interrupter operating energy.

Nyckelord: circuit breakers, controlled switching, fault interruption, high voltage, hypothesis testing, least mean squares regression, power system protection

Denna post skapades 2007-08-21. Senast ändrad 2013-09-25.
CPL Pubid: 45385


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Institutioner (Chalmers)

Institutionen för energi och miljö, Elteknik (2005-2017)


Elektroteknik och elektronik

Chalmers infrastruktur


Datum: 2007-09-21
Tid: 10:00
Lokal: Lecture room E:A, Hörsalsvägen 11, Chalmers
Opponent: Professor Dr Rene P. P. Smeets, Manager, T&D Testing, Product Development and Innovation, KEMA Nederland BV, Arnhem, the Netherlands

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Doktorsavhandlingar vid Chalmers tekniska högskola. Ny serie 2657