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Instruction level energy model for the Adapteva Epiphany multi-core processor

Gabriel Ortiz (Institutionen för data- och informationsteknik (Chalmers)) ; Lars Svensson (Institutionen för data- och informationsteknik, Datorteknik (Chalmers)) ; Erik Alveflo (Institutionen för data- och informationsteknik (Chalmers)) ; Per Larsson-Edefors (Institutionen för data- och informationsteknik, Datorteknik (Chalmers))
14th ACM International Conference on Computing Frontiers, CF 2017, Siena, Italy, 15-17 May 2017 p. 380-384. (2017)
[Konferensbidrag, refereegranskat]

Processor energy models can be used by developers to estimate, without the need of hardware implementation or additional measurement setups, the power consumption of so ware applications. Furthermore, these energy models can be used for energy-aware compiler optimization. is paper presents a measurement-based instruction-level energy characterization for the Adapteva Epiphany processor, which is a 16-core shared-memory architecture connected by a 2D network-on-chip. Based on a number of microbenchmarks, the instruction-level characterization was used to build an energy model that includes essential Epiphany instructions such as remote memory loads and stores. To validate the model, an FFT application was developed. is validation showed that the energy estimated by the model is within 0.4% of the measured energy.



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Denna post skapades 2017-06-16. Senast ändrad 2017-08-30.
CPL Pubid: 249915

 

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