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On the Modeling of High Power FET Transistors

Iltcho Angelov (Institutionen för mikroteknologi och nanovetenskap, Mikrovågselektronik) ; Mattias Thorsell (Institutionen för mikroteknologi och nanovetenskap, Mikrovågselektronik) ; Marcus Gavell (Institutionen för mikroteknologi och nanovetenskap, Mikrovågselektronik) ; Oliver Silva Barrera (Institutionen för mikroteknologi och nanovetenskap, Mikrovågselektronik)
2016 11th European Microwave Integrated Circuits Conference (Eumic), London, England, Oct 03-04, 2016 p. 245-248. (2016)
[Konferensbidrag, refereegranskat]

The paper address some of the problems faced when modeling high power and high power density GaN and GaAs FETs. When operating a high power levels (>1kW) additional effects are observed in GaN devices that are not seen in low power operation (1W). Similar effects start to act on GaAs devices when operated at high power densities. In order to account for these effects, FET models were extended to include temperature, and bias dependence of the access resistances, as well as inflection points in the transconductance, and capacitances. Thus enabling accurate models of the latest generation of enhancement mode, KV range FETs. The recent extensions are evaluated, implemented, and available in major CAD tools like ADS, Cadence, and Microwave office.

Nyckelord: Transistor Modeling, FET, High Power FET, equivalent-circuit, hemt



Denna post skapades 2017-02-08. Senast ändrad 2017-02-22.
CPL Pubid: 248064

 

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