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Comments on "A module generator for optimized CMOS buffers"

Nils Hedenstierna (Institutionen för fasta tillståndets elektronik) ; Kjell Jeppson (Institutionen för fasta tillståndets elektronik ; Institutionen för mikroelektronik och nanovetenskap)
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (0278-0070). Vol. 12 (1993), 1, p. 180-181.
[Artikel, övrig]

For the original article see ibid., vol.9, no.10, p.1028-46 (1990). In the above-titled paper A.J. Al-Khalili et al. claim that the expression derived by the commenters (1987) for the short-circuit energy dissipation per transition for a CMOS inverter while the n-channel transistor is discharging the load capacitor is not correct, and they suggest that some mistakes were made during the integration. The commenters point out that a rederivation showed that their expression is correct, and even if it is given for equal p- and n-channel transistors, it can easily be generalized to arbitrary p- and n-channel transistor sizes.

Nyckelord: Capacitors, Energy dissipation, Biographies, Computer science, Logic testing, Leg, Merging, Printing, Voltage, Equations



Denna post skapades 2017-01-28. Senast ändrad 2017-01-29.
CPL Pubid: 247803

 

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Institutioner (Chalmers)

Institutionen för fasta tillståndets elektronik (1985-1998)
Institutionen för mikroelektronik och nanovetenskap (1900-2003)

Ämnesområden

Elektroteknik och elektronik

Chalmers infrastruktur