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Venice: Exploring Server Architectures for Effective Resource Sharing

Jianbo Dong ; Rui Hou ; Michael Huang ; Tao Jiang ; Boyan Zhao ; Sally A McKee (Institutionen för data- och informationsteknik, Datorteknik (Chalmers)) ; Haibin Wang ; Xiaosong Cui ; Lixin Zhang
22nd IEEE International Symposium on High Performance Computer Architecture, HPCA 2016, Barcelona, Spain, 12-16 March 2016 (1530-0897). p. 507-518. (2016)
[Konferensbidrag, refereegranskat]

Consolidated server racks are quickly becoming the backbone of IT infrastructure for science, engineering, and business, alike. These servers are still largely built and organized as when they were distributed, individual entities. Given that many fields increasingly rely on analytics of huge datasets, it makes sense to support flexible resource utilization across servers to improve cost-effectiveness and performance. We introduce Venice, a family of data-center server architectures that builds a strong communication substrate as a first-class resource for server chips. Venice provides a diverse set of resource-joining mechanisms that enables user programs to efficiently leverage non-local resources. To better understand the implications of design decisions about system support for resource sharing we have constructed a hardware prototype that allows us to more accurately measure end-to-end performance of at-scale applications and to explore tradeoffs among performance, power, and resource-sharing transparency. We present results from our initial studies analyzing these tradeoffs when sharing memory, accelerators, or NICs. We find that it is particularly important to reduce or hide latency, that data-sharing access patterns should match the features of the communication channels employed, and that inter-channel collaboration can be exploited for better performance.

Article number 7446090


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Denna post skapades 2016-03-04. Senast ändrad 2016-10-14.
CPL Pubid: 232798


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