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A Methodology for Modeling Dynamic and Static Power Consumption

Bhavishya Goel (Institutionen för data- och informationsteknik, Datorteknik (Chalmers)) ; Sally A McKee (Institutionen för data- och informationsteknik, Datorteknik (Chalmers))
IEEE International Parallel and Distributed Processing Symposium (IPDPS 2016) (1530-2075). p. 273-282. (2016)
[Konferensbidrag, refereegranskat]

System designers and application programmers must consider trade-offs between performance and energy. Making energy-aware decisions when designing an application or runtime system requires quantitative information about power consumed by different processor components. We present a methodology to model static and dynamic power consumption of individual cores and the uncore components, and we validate our power model for both sequential and parallel benchmarks at different voltage-frequency pairs on an Intel Haswell platform. Our power models yield the following insights about energy-efficient scaling. (1) We show that uncore energy accounts for up to 74% of total energy. In particular, uncore static energy can be as high as 61% of total energy, potentially making it a major source of energy inefficiency. (2) We find that the frequency at which an application expends the lowest energy depends on how memory-bound it is. (3) We demonstrate that even though using more cores may improve performance, the energy consumed by stalled cores during serial portions of the program can make using fewer cores more energy-efficient.

Nyckelord: Power Modeling; Static and Dynamic Power; Energy Characterization

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Denna post skapades 2016-03-04. Senast ändrad 2017-06-28.
CPL Pubid: 232791


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