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Oscillator circuit with tuneable signal delay means

Harald Jacobsson ; Spartak Gevorgian (Institutionen för mikroteknologi och nanovetenskap, Fysikalisk elektronik) ; Thomas Lewin

The invention discloses an oscillator circuit (100, 200, 300, 400), comprising an oscillating element (110, 210, 310, 410) and output means (115, 215, 315, 415) for outputting an oscillation frequency from the oscillating circuit. The circuit further comprises a signal delay means (120, 220, 320, 420) which is arranged in series with the oscillating element and feeds the output signal back to the oscillating element. The delay means is (120, 220, 320, 420) tuneable with respect to the delay it provides. The oscillating element can be an amplifier or a VCO, and the delay means can be a Delay Locked Loop or a tuneable delay line, depending on the embodiment of the invention.

Denna post skapades 2015-02-23.
CPL Pubid: 212976


Institutioner (Chalmers)

Institutionen för mikroteknologi och nanovetenskap, Fysikalisk elektronik (2007-2010)


Elektroteknik och elektronik

Chalmers infrastruktur