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Performance and power consumption evaluation of concurrent queue implementations in embedded systems

Lazaros Papadopoulos ; Ivan Walulya (Institutionen för data- och informationsteknik, Nätverk och system (Chalmers) ) ; Paul Renaud-Goud (Institutionen för data- och informationsteknik, Nätverk och system (Chalmers) ) ; Philippas Tsigas (Institutionen för data- och informationsteknik, Nätverk och system (Chalmers) ) ; Dimitrios Soudris ; Brendan Barry
Computer Science-Research and Development (1865-2034). Vol. 30 (2015), 2, p. 165-175.
[Konferensbidrag, refereegranskat]

Embedded and high performance computing (HPC) systems face many common challenges. One of them is the synchronization of the memory accesses in shared data. Concurrent queues have been extensively studied in the HPC domain and they are used in a wide variety of HPC applications. In this work, we evaluate a set of concurrent queue implementations in an embedded platform, in terms of execution time and power consumption. Our results show that by taking advantage of the embedded platform specifications, we achieve up to 28.2 % lower execution time and 6.8 % less power dissipation in comparison with the conventional lock-based queue implementation. We show that HPC applications utilizing concurrent queues can be efficiently implemented in embedded systems and that synchronization algorithms from the HPC domain can lead to optimal resource utilization of embedded platforms.

Nyckelord: Multicore platforms Concurrent data structures Lock-free

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Denna post skapades 2015-01-16. Senast ändrad 2015-10-01.
CPL Pubid: 210911


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