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Performance and energy analysis of the restricted transactional memory implementation on haswell

Bhavishya Goel (Institutionen för data- och informationsteknik, Datorteknik (Chalmers)) ; Ruben Titos Gil (Institutionen för data- och informationsteknik, Datorteknik (Chalmers)) ; Anurag Negi (Institutionen för data- och informationsteknik, Datorteknik (Chalmers)) ; Sally A McKee (Institutionen för data- och informationsteknik, Datorteknik (Chalmers)) ; Per Stenström (Institutionen för data- och informationsteknik, Datorteknik (Chalmers))
Proceedings of the International Parallel and Distributed Processing Symposium, IPDPS (1530-2075). p. 615-624. (2014)
[Konferensbidrag, refereegranskat]

Hardware transactional memory implementations are becoming increasingly available. For instance, the Intel Core i7 4770 implements Restricted Transactional Memory (RTM) support for Intel Transactional Synchronization Extensions (TSX). In this paper, we present a detailed evaluation of RTM performance and energy expenditure. We compare RTM behavior to that of the TinySTM software transactional memory system, first by running micro benchmarks, and then by running the STAMP benchmark suite. We find that which system performs better depends heavily on the workload characteristics. We then conduct a case study of two STAMP applications to assess the impact of programming style on RTM performance and to investigate what kinds of software optimizations can help overcome RTM's hardware limitations.

Nyckelord: Energy evaluation, HTM, Performance evaluation, RTM, TSX


Article number 6877294



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Denna post skapades 2014-09-11. Senast ändrad 2016-03-22.
CPL Pubid: 202657

 

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