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DTail: A flexible approach to DRAM refresh management

Z. Cui ; Sally A McKee (Institutionen för data- och informationsteknik, Datorteknik (Chalmers)) ; Z. Zha ; Y. Bao ; M. Chen
28th ACM International Conference on Supercomputing, ICS 2014; Munich; Germany; 10 June 2014 through 13 June 2014 p. 43-52. (2014)
[Konferensbidrag, refereegranskat]

DRAM cells must be refreshed (or rewritten) periodically to maintain data integrity, and as DRAM density grows, so does the refresh time and energy. Not all data need to be refreshed with the same frequency, though, and thus some refresh operations can safely be delayed. Tracking such information allows the memory controller to reduce refresh costs by judiciously choosing when to refresh different rows Solutions that store imprecise information miss opportunities to avoid unnecessary refresh operations, but the storage for tracking complete information scales with memory capacity. We therefore propose a flexible approach to refresh management that tracks complete refresh information within the DRAM itself, where it incurs negligible storage costs (0.006% of total capacity) and can be managed easily in hardware or software. Completely tracking multiple types of refresh information (e.g., row retention time and data validity) maximizes refresh reduction and lets us choose the most effective refresh schemes. Our evaluations show that our approach saves 25-82% of the total DRAM energy over prior refresh-reduction mechanisms.

Nyckelord: dram refresh , energy saving , refresh management

Denna post skapades 2014-07-23. Senast ändrad 2016-08-22.
CPL Pubid: 200675


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Institutioner (Chalmers)

Institutionen för data- och informationsteknik, Datorteknik (Chalmers)


Data- och informationsvetenskap

Chalmers infrastruktur