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**Harvard**

Bao, M. och Kozhuharov, R. (2013) *A novel frequency multiplier*.

** BibTeX **

@misc{

Bao2013,

author={Bao, Mingquan and Kozhuharov, Rumen},

title={A novel frequency multiplier},

abstract={It is an object to obtain a frequency multiplier which simultaneously can generate more than one multiple of an input frequency.
This object is obtained by means of a frequency multiplier which comprises a first and a second stage connected in series with each other. The first stage is arranged to receive an input AC signal and to generate an output signal comprising harmonics of the input AC signal and to deliver these harmonics to the second stage, which is arranged to receive the output signal from the first stage.
In the frequency multiplier, the second stage comprises integer N bipolar/FET transistors, each of which is arranged to receive the output signal from the first stage at its base/gate and to be biased by means of a base/gate bias voltage. In the frequency multiplier’s second stage, the base/gate bias voltage of transistor number n in the second stage is higher than that of transistor number n+1, and each of the N transistors in the second stage has its collector/drain connected to a high pass filter.
},

year={2013},

keywords={frequency, multiplier},

}

** RefWorks **

RT Patent

SR Print

ID 192485

A1 Bao, Mingquan

A1 Kozhuharov, Rumen

T1 A novel frequency multiplier

YR 2013

AB It is an object to obtain a frequency multiplier which simultaneously can generate more than one multiple of an input frequency.
This object is obtained by means of a frequency multiplier which comprises a first and a second stage connected in series with each other. The first stage is arranged to receive an input AC signal and to generate an output signal comprising harmonics of the input AC signal and to deliver these harmonics to the second stage, which is arranged to receive the output signal from the first stage.
In the frequency multiplier, the second stage comprises integer N bipolar/FET transistors, each of which is arranged to receive the output signal from the first stage at its base/gate and to be biased by means of a base/gate bias voltage. In the frequency multiplier’s second stage, the base/gate bias voltage of transistor number n in the second stage is higher than that of transistor number n+1, and each of the N transistors in the second stage has its collector/drain connected to a high pass filter.

LA eng

OL 30