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Method for reducing EMI and IR-drop in digital synchronous circuits

Hans Lindkvist ; Lars Svensson (Institutionen för datorteknik)

A method for designing a synchronous digital circuit that exploits clock skew so as to reduce EMI and IR-drop. The circuit has a plurality of storage elements connected to combinational logic blocks, each of the storage elements being driven by a clock signal distributed from a clock device; and the method involves substantially maximizing the clock skew in the circuit subject to one or more constraints on the design of the circuit.

Denna post skapades 2013-07-09.
CPL Pubid: 180013


Institutioner (Chalmers)

Institutionen för datorteknik (2002-2004)


Data- och informationsvetenskap

Chalmers infrastruktur