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Wafer bonding and smartcut for formation of silicon-on-insulator materials

Stefan Bengtsson (Institutionen för mikroelektronik, Fasta tillståndets elektronik)
International Conference on Solid-State and Integrated Circuit Technology Proceedings p. 745. (1998)
[Konferensbidrag, refereegranskat]

Silicon-on-insulator (SOI) materials are expected to get an increased attention for mainstream CMOS as well as for high frequency or high voltage applications. Of the existing methods for manufacture of SOI materials, wafer bonding combined with smartcut seems to be the most promising approach. In the case of wafer bonding, surface micro-roughness, wafer dimensions, surface chemistry and ambient pressure all influence the result. In the smartcut technology, hydrogen implantation and an annealing step can be controlled for a precise splitting of a silicon wafer, thereby forming a thin silicon film. In this presentation the application of wafer bonding and smartcut for formation of SOI materials will be reviewed.

Nyckelord: CMOS integrated circuits, Silicon wafers, Bonding, Silicon on insulator technology, Surface roughness, Surface chemistry, Pressure effects, Ion implantation, Annealing



Denna post skapades 2006-09-19. Senast ändrad 2015-02-11.
CPL Pubid: 17799

 

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Institutioner (Chalmers)

Institutionen för mikroelektronik, Fasta tillståndets elektronik (1997-2003)

Ämnesområden

Elektronik

Chalmers infrastruktur