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Integration of silicon and diamond, aluminum nitride or aluminum oxide for electronic materials

Stefan Bengtsson (Institutionen för mikroelektronik, Fasta tillståndets elektronik) ; Mats Bergh (Institutionen för mikroelektronik, Fasta tillståndets elektronik) ; Anders Soderbarg ; Bengt Edholm ; Jörgen Olsson ; Per Ericsson (Institutionen för mikroelektronik, Fasta tillståndets elektronik) ; Stefan Tiensuu
conference proceedings:III-V and IV-IV Materials and Processing Challenges for Highly Integrated Microelectronics and Optoelectronics. Symposium. p. 133. (1999)
[Konferensbidrag, refereegranskat]

Material integration for the formation of advanced silicon-on-insulator materials by wafer bonding and etch-back is discussed. Wafer bonding allows the combining of materials that it is not possible to grow on top of each other by any other technique. In our experiments, polycrystalline diamond, aluminum nitride or aluminum oxide films with thickness of 0.1-5 μm were deposited on silicon wafers. Bonding experiments were made with these films to bare silicon wafers with the goal of forming silicon-on-insulator structures with buried films of polycrystalline diamond, aluminum nitride or aluminum oxide. These silicon-on-insulator structures are intended to address self-heating effects in conventional silicon-on-insulator materials with buried layers of silicon dioxide. The surfaces of the deposited diamond films were, by order of magnitude, too rough to allow direct bonding to a silicon wafer. In contrast the deposited aluminum nitride and aluminum oxide films did allow direct bonding to silicon. Bonding of the diamond surface to silicon was instead made through a deposited and polished layer of polycrystalline silicon on top of the diamond. In the case of the aluminum nitride electrostatic bonding was also demonstrated. Further, the compatibility of these insulators to silicon process technology was investigated

Nyckelord: aluminium compounds, buried layers, diamond, elemental semiconductors, silicon-on-insulator, surface topography, wafer bonding

Denna post skapades 2006-09-19. Senast ändrad 2015-02-11.
CPL Pubid: 17768


Institutioner (Chalmers)

Institutionen för mikroelektronik, Fasta tillståndets elektronik (1997-2003)



Chalmers infrastruktur