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High-level Modeling of Switching Activity with Application to Low-power DSP System Synthesis

Magnus Lundberg (Institutionen för signaler och system, Signalbehandling) ; Khurram Muhammad ; Kaushik Roy ; S.K. Wilson
Proc. 1999 International Conference on Acoustics, Speech, and Signal Processing (ICASSP'99), Phoenix, AZ, USA p. 1877-1880. (1999)
[Konferensbidrag, refereegranskat]

We address the issue of high-level synthesis of tow-power digital signal processing (DSP) systems by proposing switching activity models. In particular, we present a technology independent hierarchical scheme to compare relative power performance of two competing DSP systems. The basic building blocks considered for such system are a full-adder and a one-bit delay. Estimates of switching activity at the output of these building blocks is used to model the activity in different architectural primitives used for building DSP systems. This method is very fast and simple and simulations show accuracy within 4% of extensive bit-level simulations. Therefore, it can easily be integrated into current communications/DSP CAD tools for low-power applications. The models show that the choice of multiplier/multiplicand is important when using array multipliers in a data-path. If the input signal with smaller variance is chosen as the as the multiplicand, up to 20% savings in switching activity can be achieved. This observation is verified by analog simulation.



Denna post skapades 2006-08-25. Senast ändrad 2013-06-14.
CPL Pubid: 15977

 

Institutioner (Chalmers)

Institutionen för signaler och system, Signalbehandling

Ämnesområden

Information Technology

Chalmers infrastruktur