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**Harvard**

Lundberg, M., Muhammad, K., Roy, K. och Kate Wilson, S. (2001) *A Novel Approach to High Level Switching Activity Modeling with Applications to Low Power DSP System Synthesis*.

** BibTeX **

@article{

Lundberg2001,

author={Lundberg, Magnus and Muhammad, Khurram and Roy, Kaushik and Kate Wilson, Sarah},

title={A Novel Approach to High Level Switching Activity Modeling with Applications to Low Power DSP System Synthesis},

journal={IEEE Transactions on Signal Processing},

issn={1053-587X},

volume={49},

issue={12},

pages={3157-3167},

abstract={We address high-level synthesis of low-power digital signal processing (DSP) systems by using efficient switching activity models. We present a technology-independent hierarchical scheme that can be easily integrated into current communications/DSP CAD tools for comparing the relative power/performance of two competing DSP designs without specific knowledge of transistor-level details. The basic building blocks considered for such systems are a full adder, a half adder, and a one-bit delay. Estimates of the switching activity at the output of these primitives are used to model the activity in more complex building blocks of DSP systems. The presented hierarchical method is very fast and simple. The accuracy of estimates obtained using the proposed approach is shown to be within 4% of the results obtained using extensive bit-level simulations. Our approach shows that the choice of multiplier/multiplicand is important when using array multipliers in a datapath. If the input signal with smaller mean square value is chosen as the multiplicand, almost 20% savings in switching activity can be achieved. This observation is verified by an analog simulation using a 16 x 16 bit array multiplier implemented in a 0.6-mu process with 3.3 V supply voltage.},

year={2001},

keywords={high-level modeling, input reordering, low power synthesis, power estimation, switching activity},

}

** RefWorks **

RT Journal Article

SR Electronic

ID 14920

A1 Lundberg, Magnus

A1 Muhammad, Khurram

A1 Roy, Kaushik

A1 Kate Wilson, Sarah

T1 A Novel Approach to High Level Switching Activity Modeling with Applications to Low Power DSP System Synthesis

YR 2001

JF IEEE Transactions on Signal Processing

SN 1053-587X

VO 49

IS 12

SP 3157

OP 3167

AB We address high-level synthesis of low-power digital signal processing (DSP) systems by using efficient switching activity models. We present a technology-independent hierarchical scheme that can be easily integrated into current communications/DSP CAD tools for comparing the relative power/performance of two competing DSP designs without specific knowledge of transistor-level details. The basic building blocks considered for such systems are a full adder, a half adder, and a one-bit delay. Estimates of the switching activity at the output of these primitives are used to model the activity in more complex building blocks of DSP systems. The presented hierarchical method is very fast and simple. The accuracy of estimates obtained using the proposed approach is shown to be within 4% of the results obtained using extensive bit-level simulations. Our approach shows that the choice of multiplier/multiplicand is important when using array multipliers in a datapath. If the input signal with smaller mean square value is chosen as the multiplicand, almost 20% savings in switching activity can be achieved. This observation is verified by an analog simulation using a 16 x 16 bit array multiplier implemented in a 0.6-mu process with 3.3 V supply voltage.

LA eng

DO 10.1109/78.969522

LK http://dx.doi.org/10.1109/78.969522

OL 30