CPL - Chalmers Publication Library
| Utbildning | Forskning | Styrkeområden | Om Chalmers | In English In English Ej inloggad.

Cascaded logic gates in nanophotonic plasmon networks

H. Wei ; Z. X. Wang ; X. R. Tian ; Mikael Käll (Institutionen för teknisk fysik, Bionanofotonik) ; H. X. Xu
Nature Communications (2041-1723). Vol. 2 (2011), p. art.no. 387.
[Artikel, refereegranskad vetenskaplig]

Optical computing has been pursued for decades as a potential strategy for advancing beyond the fundamental performance limitations of semiconductor-based electronic devices, but feasible on-chip integrated logic units and cascade devices have not been reported. Here we demonstrate that a plasmonic binary NOR gate, a 'universal logic gate', can be realized through cascaded OR and NOT gates in four-terminal plasmonic nanowire networks. This finding provides a path for the development of novel nanophotonic on-chip processor architectures for future optical computing technologies.

Nyckelord: guide quantum circuits, silver nanowires, light, chip, manipulation, propagation, operations, devices, physics, optics

Denna post skapades 2011-11-21. Senast ändrad 2017-10-03.
CPL Pubid: 148790


Läs direkt!

Lokal fulltext (fritt tillgänglig)

Länk till annan sajt (kan kräva inloggning)

Institutioner (Chalmers)

Institutionen för teknisk fysik, Bionanofotonik (2007-2015)


Optisk fysik

Chalmers infrastruktur