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ZEBRA: A data-centric, hybrid-policy hardware transactional memory design

R. Titos-Gil ; Anurag Negi (Institutionen för data- och informationsteknik, Datorteknik (Chalmers)) ; M. E. Acacio ; J. M. García ; Per Stenström (Institutionen för data- och informationsteknik, Datorteknik (Chalmers))
Proceedings of the International Conference on Supercomputing, ICS 2011. Tucson, 31 May-4 June 2011 p. 53-62 . (2011)
[Konferensbidrag, refereegranskat]

Hardware Transactional Memory (HTM) systems, in prior research, have either fixed policies of conflict resolution and data versioning for the entire system or allowed a degree of flexibility at the level of transactions. Unfortunately, this results in susceptibility to pathologies, lower average performance over diverse workload characteristics or high design complexity. In this work we explore a new dimension along which flexibility in policy can be introduced. Recognizing the fact that contention is more a property of data rather than that of an atomic code block, we develop an HTM system that allows selection of versioning and conflict resolution policies at the granularity of cache lines. We discover that this neat match in granularity with that of the cache coherence protocol results in a design that is very simple and yet able to track closely or exceed the performance of the best performing policy for a given workload. It also brings together the benefits of parallel commits (inherent in traditional eager HTMs) and good optimistic concurrency without deadlock avoidance mechanisms (inherent in lazy HTMs), with little increase in complexity.

Nyckelord: contention management, hardware transactional memory



Denna post skapades 2011-09-08. Senast ändrad 2013-01-04.
CPL Pubid: 145942

 

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Institutioner (Chalmers)

Institutionen för data- och informationsteknik, Datorteknik (Chalmers)

Ämnesområden

Information Technology

Chalmers infrastruktur