CPL - Chalmers Publication Library
| Utbildning | Forskning | Styrkeområden | Om Chalmers | In English In English Ej inloggad.

Reduction of current instabilities in silicon nanogaps

Jonas Berg (Institutionen för mikroteknologi och nanovetenskap, Fasta tillståndets elektronik) ; Per Lundgren (Institutionen för mikroteknologi och nanovetenskap, Fasta tillståndets elektronik) ; Peter Enoksson (Institutionen för mikroteknologi och nanovetenskap, Fasta tillståndets elektronik)
Microelectronic Engineering (01679317 ). Vol. 83 (2006), 11-12, p. 2469-2474.
[Artikel, refereegranskad vetenskaplig]

Silicon nanogaps are electrodes for connecting nanoscale elements to silicon technology. Two silicon electrodes are separated by a thin silicon dioxide layer, which is removed by selective etching to create a nanometer sized accessible gap. Parasitic gap currents with large instabilities occur after the etching. These are compared to the instabilities in ordinary MOS (metal oxide silicon) devices after soft breakdown. Clear similarities are seen when subjecting the devices to constant voltage stress, storing them and annealing them. We discuss a percolation-based model for the instable current, in which the percolation clusters are defects in the oxide surface created during the etching, or possibly contaminating residuals from the same process. © 2006 Elsevier B.V. All rights reserved.



Denna post skapades 2009-11-20. Senast ändrad 2015-12-17.
CPL Pubid: 101954

 

Läs direkt!


Länk till annan sajt (kan kräva inloggning)


Institutioner (Chalmers)

Institutionen för mikroteknologi och nanovetenskap, Fasta tillståndets elektronik (2003-2006)

Ämnesområden

Fysik

Chalmers infrastruktur